1. Field of the Invention
The present invention relates to a semiconductor device and a test method thereof, and more particularly relates to a semiconductor device capable of performing an operation test of inputting and outputting actual plural pieces of test data at a high speed, instead of compressed data that is a result of compressing plural pieces of test data, and to a test method of the semiconductor device.
2. Description of Related Art
In a manufacturing process of semiconductor devices such as DRAM (Dynamic Random Access Memory), an operation test is performed. The operation test checks whether manufactured semiconductor devices correctly operate. For example, in a DRAM, a defective cell is detected by an operation test that is performed in a wafer state. An address of the defective cell is relieved by replacing the defective cell with an auxiliary redundant cell.
Such an operation test is performed in parallel on many semiconductor devices (many chips) that are formed on a wafer, to shorten a test time. To further shorten the test time, the number of semiconductor devices to be tested in parallel needs to be increased. Therefore, it is a common procedure to perform a so-called “compression test”, in order to test many semiconductor devices in parallel by using a limited number of determination circuits (comparators) within a tester that tests semiconductor devices (see Japanese Patent Application Laid-open No. 2003-168299).
The compression test is not a method of directly inputting and outputting actual test data, but is a method of compressing plural pieces of test data by a data compressing circuit provided within a semiconductor device and inputting and outputting compressed data of the test data via a part of data input/output terminals. When the compression test is used, the number of determination circuits of a tester to be allocated to the semiconductor devices becomes considerably small. In this manner, the number of semiconductor devices that can be tested in parallel can be increased.
However, because compressed data is used in a compression test, the result of the compression test does not necessarily completely match that of a test using non-compressed actual data. For example, the accuracy of plural data input/output terminals and the accuracy of a part of data input/output terminals and a part of data input/output circuits among data input/output circuits respectively related to the plural data input/output terminals are verified by the compression test. However, the accuracy of remaining data input/output terminals and the accuracy of remaining data input/output circuits are not verified by the compression test. A test that uses non-compressed actual data can be performed after semiconductor devices are singulated into individual semiconductor devices by dicing a wafer. When shipping semiconductor devices in a wafer state, for example, it is desired to perform a test that uses actual data in a wafer state as well.